Adopting ASR's first domestically produced SoC chip that supports LoRa's LPWAN wireless communication protocol
The Lora core adopts the new generation SX1262 design scheme, which has longer transmission distance, faster speed, and smaller size.
Support fixed-point transmission, transparent transmission, wireless wake-up, and wireless relay functions, greatly improving the functionality and efficiency based on the high-performance MCU.
The internal data processing adopts a three-level cache, greatly increasing the stability and real-time performance of the data.
Supports license-free ISM 433MHz band and 470MHz meter reading band.
Adopts LoRa spread spectrum technology, which has strong anti-interference performance and long communication distance.
Supports users to set their communication keys, which cannot be read, greatly improving the confidentiality of user data.
Supports up to 5W (about 37dBm) of transmit power.
Support AT command configuration.
Support Modbus programmable register read/write operation, flexibility to customize the product function.
Support transparent transmission, fixed-point transmission, broadcast transmission, channel monitoring, wireless relay and other functions.
Supports data transfer rates from 0.3k to 62.5k bps.
Industrial standard design, supporting long-term use at -40 ~ + 85 ℃
Dual antenna optional, U.LF connector or stamp hole (selected with 0 Ω resistance), default U.FL connector
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